1. Field of the Invention
The present invention relates to an oscillator, and more particularly, to a voltage control oscillator.
2. Description of Related Art
A common VCO is illustrated as FIG. 1A. Referring to FIG. 1A, it is a schematic block diagram of a common VCO. In FIG. 1A, a clock signal CLK outputted from the VCO 100 is controlled by an input voltage VCOIN. The VCO 100 comprises a voltage/current converter 110 and a current control oscillating circuit 120. For the current control oscillating circuit 120, under a same supplying current 111, the oscillating frequency is lower if fabricated with SLOW process or operated in higher temperature, whereas the oscillating frequency is higher if fabricated with FAST process or operated in lower temperature.
Referring to FIG. 1B, it illustrates a schematic diagram of a conventional circuit of the voltage/current converter 110 of the VCO in FIG. 1A. In FIG. 1B, the supplying current 111 of the CCO 120 is designed as equal to the current IP, where IP=K*(VCOIN−VTHN)2, where K is a constant, VTHN is a threshold voltage of the N-type transistor 112. The threshold voltage VTHN varies with the fabricating process or temperature. In other words, VTHN is increased as fabricated with SLOW process or higher temperature, whereas VTHN is decreased as fabricated with FAST process or lower temperature. Therefore, under a same input voltage level VCOIN, if fabricated with SLOW process or higher temperature, the current IP (current 111) is decreased, thus frequency of the clock signal CLK is slower; whereas if fabricated with FAST process or lower temperature, the current IP (current 111) is increased, thus frequency of the clock signal CLK is faster.
Referring to FIG. 1C, it illustrates a schematic diagram of frequency vs. voltage of the VCO in FIG. 1A. In FIG. 1C, a system voltage is assigned to 3.3 volts. It is obvious that with different fabrication process and different temperature, various output frequencies are generated under a same input voltage level.
A phase lock loop (PLL) is a common application for a VCO. The operating frequency range, FM distortion, central frequency migration, the central frequency and the current/voltage sensitivity of the PLL are all featured by the VCO thereof. The central frequency may migrate because the transient switching time significantly dominates the oscillating period, and during switching period, the transient phenomenon is related to parasitic capacitance of the circuit, resistance of the circuit, gm of the transistor and input resistance of the transistor, which are highly related to temperature. Moreover, since fabrication fluctuation results in change of circuit states, the factors are all significant when designed to comply with specs and yield requirement. In a conventional scheme, usually enlarging the circuit area, and increasing operating current and voltage incur undesirable cost inflation.